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job requirements:

1. Electronics-related major, bachelor's degree or above, with over 3 years of technical job experience;

2. Possess experience as an FAE or R&D professional in chip OEMs, solution providers, or OEM manufacturers;

3. Proficient in capacitive touch principles and related project application debugging experience, with BLDC debugging experience;

4. Proficient in schematic design and 2-4 layer PCB layout, with expertise in operating various common electronic instruments;

5. Possess strong problem-solving and troubleshooting skills, capable of quickly responding to and resolving on-site issues;

6. Possess strong learning abilities, work enthusiasm, a positive attitude, and a strong sense of professional commitment;

7. Possess cross-departmental communication skills and the ability to clearly convey design constraints to the team.

fringe benefits:

1. Five days with eight-hour workdays, weekends off;

2. Enjoy statutory holidays, annual leave, marriage leave, bereavement leave, sick leave, and other benefits in accordance with the law;

3. Purchase social insurance and housing provident fund: including basic medical insurance (Tier 1), pension insurance, work-related injury insurance, unemployment insurance, maternity insurance, and housing provident fund;

4. Annual salary adjustments and year-end bonus distribution;

5. A monthly full attendance bonus of 200 yuan is provided;

6. The company provides accommodation;

7. Rich recreational activities (afternoon tea, travel, dining, annual meetings, etc.); Monthly birthday parties, afternoon tea sessions, as well as badminton and table tennis events, enriching employees' leisure lives;

8. The company offers a comprehensive technical platform, a well-established training system, and a robust promotion mechanism;

9. The working environment is pleasant, with a superior geographical location near subway stations and bus stops.

Contact: Miss Xu

Tel: 0755-83190593

Email: xuyue@csc-ic.com

job requirements:

1. Lead the definition of chip specifications, develop PPA (performance, functionality, area) balanced architecture solutions based on scenario requirements, and output design constraint documents;

2. Independently complete the microarchitecture design of key modules, clarify the timing convergence path and low-power strategy;

3. Independently write ETL code and complete functional simulation, solve code coverage and assertion verification issues, and output verification reports;

4. Guide the layout design team to complete layout and routing, solve backend issues such as timing violations and crosstalk, and ensure that the chip area and yield meet the standards;

5. Collaborate with the validation team to optimize test cases and provide debugging support (such as root cause analysis of exceptions);

6. Lead the development of chip testing plans (such as ATE machine debugging), analyze mass production failure cases, and select alternative designs (such as ESD protection optimization);

7. Write technical specifications, DFT (Design for Testability) documents, and troubleshooting manuals, and establish a module level IP reuse library.   

Qualifications                                                                                           

1. Experience in designing analog IC power chips;

2. Bachelor's degree or above in Electronic Engineering/Microelectronics, with over 3 years of experience in the full process development of power chips, and experience leading complete chip fabrication projects is preferred;

3. Familiar with low-power design techniques such as Power Gating and Multi VDD, with experience in optimizing small area circuits such as clock gating simplification;

4. Strong autonomous problem-solving ability, able to independently complete closed-loop development from specifications to mass production;

5. Have cross departmental communication skills and be able to clearly communicate design constraints to the team.

Welfare

1. Five day 8-hour system, weekends off;

2. Enjoy statutory holidays, annual leave, marriage leave, funeral leave, sick leave and other benefits in accordance with the law;

3. Purchase five insurances and one housing fund: including basic medical insurance (first tier), pension insurance, work-related injury insurance, unemployment insurance, maternity insurance, and housing provident fund;

4. Annual salary adjustment and year-end bonus payment;

5. There is a monthly attendance bonus of 200 yuan;

6. The company provides accommodation;

7. Rich leisure activities (afternoon tea, travel, meals, annual meetings, etc.); Every month, there are birthday parties, afternoon tea, badminton and table tennis activities to enrich employees' leisure time;

8. The company provides a broad technical platform, a comprehensive training system, and a promotion mechanism;

9. The working environment is beautiful, the geographical location is superior, and it is near the subway station and bus stop.

Contact: Miss Xu

Phone: 0755-83190593

Email: xuyue@csc-ic.com